Writing Testbenches Using System Verilog
Bergeron, Janick.
Writing Testbenches Using System Verilog by Janick Bergeron. - New Delhi Springer (India) Private Limited c2006. - xxvi, 412 p. : ill. ; 25 cm.
This book presents the same concepts as the second edition of Writing testbenches, functional verification of HDL models, but uses System Verilog as the sole implementation vehicle. The languages used in the second edition are still available.
Includes bibliographical references and index.
9788184892697
2005938214
977544923 GyFmDB
Computer hardware description languages.
Integrated circuits--Verification.
TK7885.7 / .B48 2006
621.392 BER
Writing Testbenches Using System Verilog by Janick Bergeron. - New Delhi Springer (India) Private Limited c2006. - xxvi, 412 p. : ill. ; 25 cm.
This book presents the same concepts as the second edition of Writing testbenches, functional verification of HDL models, but uses System Verilog as the sole implementation vehicle. The languages used in the second edition are still available.
Includes bibliographical references and index.
9788184892697
2005938214
977544923 GyFmDB
Computer hardware description languages.
Integrated circuits--Verification.
TK7885.7 / .B48 2006
621.392 BER
