Guide to RISC Processors: For Programmers and Engineers (Record no. 45588)

MARC details
000 -LEADER
fixed length control field 01158 a2200169 4500
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9788181286635
082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 004.3 DAN
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name Dandamudi, Sivarama P.
245 ## - TITLE STATEMENT
Title Guide to RISC Processors: For Programmers and Engineers
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT)
Name of publisher, distributor, etc Springer (India) Private Limited
Place of publication, distribution, etc New Delhi
Date of publication, distribution, etc 2005
300 ## - PHYSICAL DESCRIPTION
Extent 387
520 ## - SUMMARY, ETC.
Summary, etc Recently, there has been a trend toward processors based on the RISC (Reduced Instruction Set Computer) design. This is an accessible and all-encompassing compendium on RISC processors, introducing five of them: MIPS, SPARC, PowerPC, ARM, and Intel's 64-bit Itanium. Initial chapters explain differences between the CISC and RISC designs, and the core RISC design principles are clearly discussed. Later chapters provide instruction on MIPS assembly language programming, so that readers can readily learn the concepts and principles introduced earlier. Professionals, programmers, and students in computer architecture and programming courses will find the guide an essential resource
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Microprocessors-Programming
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer Network Architectures
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Computer Science
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type Book
Source of classification or shelving scheme Dewey Decimal Classification

No items available.