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Verilog digital system design : RT level synthesis, testbench, and verification / Zainalabedin Navabi.

By: Material type: TextTextSeries: McGraw-Hill electronic engineering seriesPublication details: New Delhi: Tata McGraw-Hill, c2006Edition: 2nd edDescription: xvi, 384 p. : ill. ; 24 cm. + 1 CD-ROM (4 3/4 in.)ISBN:
  • 0071445641
  • 9780070252219
Subject(s): DDC classification:
  • 621.392 NAV  22
LOC classification:
  • TK7885.7 .N36 2006
Online resources:
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Holdings
Item type Current library Collection Call number Status Date due Barcode Item holds
Reference Book Reference Book Alliance College of Engineering and Design Electronics and Communication Engineering 621.392 NAV (Browse shelf(Opens below)) Not for loan E06190
Book Book Alliance College of Engineering and Design Electronics and Communication Engineering 621.392 NAV (Browse shelf(Opens below)) Transacted 2016-17 E06191
Total holds: 0

Includes bibliographical references and index.

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