CMOS Circuit Design, Layout, and Simulation / R. Jacob Baker.
Material type:
TextPublication details: New Delhi: Wiley India Private Limited , c2005Edition: 2nd edDescription: xxxiii, 1038 p. : ill. ; 25 cmISBN: - 978126520374
- 621.39732 BAK 22
- TK7871.99.M44 B35 2005
| Item type | Current library | Collection | Call number | Status | Date due | Barcode | Item holds | |
|---|---|---|---|---|---|---|---|---|
Book
|
Alliance College of Engineering and Design | Electronics and Communication Engineering | 621.39732 BAK (Browse shelf(Opens below)) | Claim 2016-17 | E07271 |
Total holds: 0
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| 621.395 YAR Digital logic : | 621.395 YEA Practical Low Power Digital VLSI Design | 621.395 YEO CMOS/BiCMOS ULSI: Low Voltage, Low Power | 621.39732 BAK CMOS Circuit Design, Layout, and Simulation | 621.39732 SAC Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits | 621.39732 SAC Defect-Oriented Testing for Nano-Metric CMOS VLSI Circuits | 621.3981 ROM Multiple Access Protocols: Performance and Analysis |
"IEEE Solid-State Circuits Society, sponsor."
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