TY  - BOOK
AU  - Bergeron,Janick
TI  - Writing Testbenches Using System Verilog 
SN  - 9788184892697
AV  - TK7885.7 .B48 2006
U1  - 621.392 BER 22
PY  - 2006///
CY  - New Delhi
PB  - Springer (India) Private Limited
KW  - Computer hardware description languages
KW  - Integrated circuits
KW  - Verification
N1  - This book presents the same concepts as the second edition of Writing testbenches, functional verification of HDL models, but uses System Verilog as the sole implementation vehicle. The languages used in the second edition are still available; Includes bibliographical references and index
ER  -