000 | 01158 a2200169 4500 | ||
---|---|---|---|
020 | _a9788181286635 | ||
082 | _a004.3 DAN | ||
100 | _aDandamudi, Sivarama P. | ||
245 | _aGuide to RISC Processors: For Programmers and Engineers | ||
260 |
_bSpringer (India) Private Limited _aNew Delhi _c2005 |
||
300 | _a387 | ||
520 | _aRecently, there has been a trend toward processors based on the RISC (Reduced Instruction Set Computer) design. This is an accessible and all-encompassing compendium on RISC processors, introducing five of them: MIPS, SPARC, PowerPC, ARM, and Intel's 64-bit Itanium. Initial chapters explain differences between the CISC and RISC designs, and the core RISC design principles are clearly discussed. Later chapters provide instruction on MIPS assembly language programming, so that readers can readily learn the concepts and principles introduced earlier. Professionals, programmers, and students in computer architecture and programming courses will find the guide an essential resource | ||
650 | _aMicroprocessors-Programming | ||
650 | _aComputer Network Architectures | ||
650 | _aComputer Science | ||
942 |
_cBK _2ddc |
||
999 |
_c45588 _d45588 |